The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2018

Filed:

Mar. 16, 2015
Applicant:

Shin-etsu Handotai Co., Ltd., Tokyo, JP;

Inventor:

Takashi Aratani, Nishigo-mura, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01); G01R 31/26 (2014.01); C30B 29/06 (2006.01); C30B 33/00 (2006.01); C30B 15/20 (2006.01); C30B 15/30 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2639 (2013.01); C30B 29/06 (2013.01); C30B 15/20 (2013.01); C30B 15/30 (2013.01); C30B 33/00 (2013.01);
Abstract

A method evaluates a defect region of a semiconductor substrate based on C-V characteristics of a MOS structure formed on the semiconductor substrate, including determining a relationship between defect region and flat band voltage or fixed charge density by using a semiconductor substrate having a known defect region, under a heat treatment condition and a C-V characteristic evaluating condition identical to conditions for evaluating a defect region of a semiconductor substrate to be evaluated, determining a flat band voltage or a fixed charge density of the semiconductor substrate to be evaluated from C-V characteristics of a MOS structure formed on the semiconductor substrate to be evaluated, and identifying the defect region of the semiconductor substrate to be evaluated based on the relationship between defect region and flat band voltage or fixed charge density previously determined, whereby the defect region of the semiconductor substrate is evaluated.


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