The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2018

Filed:

Jun. 30, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Bernard Arambepola, Enfield, GB;

Thushara Hewavithana, Hatfield, GB;

Sahan S. Gamage, Cambridge, GB;

Shaul Shulman, Ramat Gan, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/10 (2006.01); H04L 27/26 (2006.01); H04L 5/00 (2006.01);
U.S. Cl.
CPC ...
H04L 27/2649 (2013.01); H04L 5/0048 (2013.01); H04L 27/2678 (2013.01);
Abstract

Methods and architectures for blind detection of physical layer control (PLC) signaling for transmitters and receivers having respective misaligned inverse fast Fourier transforms (IFFTs) and (FFTs) includes opening a frequency tracking offset calibration circuit, estimating or calculating a phase discontinuity due to FFT misalignment, closing the frequency tracking offset calibration circuit and applying a frequency correction that includes a frequency offset less the calculated or estimated phase discontinuity.


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