The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2018

Filed:

Jun. 10, 2015
Applicant:

Freescale Semiconductor, Inc., Austin, TX (US);

Inventors:

Lawrence L. Case, Austin, TX (US);

Charles E. Cannon, Austin, TX (US);

Mingle Sun, Shanghai, CN;

Thomas E. Tkacik, Phoenix, AZ (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 9/08 (2006.01); G06F 21/80 (2013.01); G06F 21/78 (2013.01); G06F 21/76 (2013.01); G06F 21/72 (2013.01); H04L 9/06 (2006.01); G06F 21/60 (2013.01); H04L 29/06 (2006.01); G09C 1/00 (2006.01); G06F 21/79 (2013.01);
U.S. Cl.
CPC ...
H04L 9/0894 (2013.01); G06F 21/60 (2013.01); G06F 21/72 (2013.01); G06F 21/76 (2013.01); G06F 21/78 (2013.01); G06F 21/79 (2013.01); G06F 21/80 (2013.01); G09C 1/00 (2013.01); H04L 9/0618 (2013.01); H04L 9/0637 (2013.01); H04L 9/088 (2013.01); H04L 9/0816 (2013.01); H04L 63/0853 (2013.01); H04L 2209/12 (2013.01);
Abstract

A method of encrypting data on a memory device includes receiving a memory transaction request at an inline encryption engine coupled between a processing core and switch fabric in a system on a chip (SOC). The memory transaction request includes a context component and a data component. The context component is analyzed to determine whether the data component will be stored in an encrypted memory region. If the data component will be stored in an encrypted memory region, the data component is encrypted and communicated to a location in the encrypted memory region. The location is based at least on the context component.


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