The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2018

Filed:

Jul. 26, 2010
Applicants:

Feng Yuan, Hsin-Chu, TW;

Tsung-lin Lee, Hsin-Chu, TW;

Hung-ming Chen, Hsin-Chu, TW;

Chang-yun Chang, Taipei, TW;

Inventors:

Feng Yuan, Hsin-Chu, TW;

Tsung-Lin Lee, Hsin-Chu, TW;

Hung-Ming Chen, Hsin-Chu, TW;

Chang-Yun Chang, Taipei, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 21/84 (2006.01); H01L 21/762 (2006.01); H01L 21/8234 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/845 (2013.01); H01L 21/76224 (2013.01); H01L 21/823431 (2013.01); H01L 29/66795 (2013.01);
Abstract

A method of forming an integrated circuit structure includes providing a semiconductor substrate including a top surface; forming a first insulation region and a second insulation region in the semiconductor substrate; and recessing the first insulation region and the second insulation region. Top surfaces of remaining portions of the first insulation region and the second insulation region are flat surfaces or divot surfaces. A portion of the semiconductor substrate between and adjoining removed portions of the first insulation region and the second insulation region forms a fin.


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