The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2018

Filed:

Jan. 27, 2016
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Shinan Wang, Kashiwa, JP;

Takashi Nakamura, Yokohama, JP;

Takayuki Teshima, Yokohama, JP;

Yutaka Setomoto, Tokyo, JP;

Shinichiro Watanabe, Yamato, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G21K 1/06 (2006.01); G01T 1/29 (2006.01); B81C 1/00 (2006.01); H01L 21/311 (2006.01); H01L 21/3205 (2006.01); G01N 23/20 (2018.01);
U.S. Cl.
CPC ...
G21K 1/06 (2013.01); B81C 1/00619 (2013.01); G01N 23/20075 (2013.01); G01T 1/295 (2013.01); H01L 21/31111 (2013.01); H01L 21/32051 (2013.01);
Abstract

A microstructure manufacturing method includes forming a first insulating film on an Si substrate, exposing an Si surface by removing a part of the first insulating film, forming a recessed portion by etching the Si substrate from the exposed Si surface, forming a second insulating film on a sidewall and a bottom of the recessed portion, forming an Si exposed surface by removing at least a part of the second insulating film formed on the bottom of the recessed portion, and filling the recessed portion with a metal from the Si exposed surface by electrolytic plating.


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