The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 2018
Filed:
Sep. 24, 2010
Steven James Heinrich, Madison, AL (US);
Alexander L. Minkin, Los Altos, CA (US);
Brett W. Coon, San Jose, CA (US);
Rajeshwaran Selvanesan, Milpitas, CA (US);
Robert Steven Glanville, Cupertino, CA (US);
Charles Mccarver, Madison, AL (US);
Anjana Rajendran, San Jose, CA (US);
Stewart Glenn Carlton, Madison, AL (US);
John R. Nickolls, Los Altos, CA (US);
Brian Fahs, Los Altos, CA (US);
Steven James Heinrich, Madison, AL (US);
Alexander L. Minkin, Los Altos, CA (US);
Brett W. Coon, San Jose, CA (US);
Rajeshwaran Selvanesan, Milpitas, CA (US);
Robert Steven Glanville, Cupertino, CA (US);
Charles McCarver, Madison, AL (US);
Anjana Rajendran, San Jose, CA (US);
Stewart Glenn Carlton, Madison, AL (US);
John R. Nickolls, Los Altos, CA (US);
Brian Fahs, Los Altos, CA (US);
NVIDIA CORPORATION, Santa Clara, CA (US);
Abstract
A method for managing a parallel cache hierarchy in a processing unit. The method including receiving an instruction that includes a cache operations modifier that identifies a level of the parallel cache hierarchy in which to cache data associated with the instruction; and implementing a cache replacement policy based on the cache operations modifier.