Nvm memory hkmg integration technology

Abstract

The present disclosure relates to an integrated circuit (IC) that includes a HKMG hybrid non-volatile memory (NVM) device and that provides small scale and high performance, and a method of formation. In some embodiments, the integrated circuit includes a memory region having a NVM device with a pair of control gate electrodes separated from a substrate by corresponding floating gates. A pair of select gate electrodes are disposed at opposite sides of the pair of control gate electrodes. A logic region is disposed adjacent to the memory region and has a logic device with a metal gate electrode disposed over a logic gate dielectric and having bottom and sidewall surfaces covered by a high-k gate dielectric layer. The select gate electrodes or the control gate electrodes comprise metal and have bottom and sidewall surfaces covered by the high-k gate dielectric layer.