The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2018
Filed:
May. 12, 2017
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Inventor:
Kuoyuan Hsu, San Jose, CA (US);
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/419 (2006.01); G06F 15/78 (2006.01); G11C 11/418 (2006.01); G11C 16/10 (2006.01); G11C 16/28 (2006.01); G11C 7/08 (2006.01); G11C 7/14 (2006.01); G11C 7/12 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01); G06F 15/781 (2013.01); G11C 7/08 (2013.01); G11C 7/12 (2013.01); G11C 7/14 (2013.01); G11C 11/418 (2013.01); G11C 16/10 (2013.01); G11C 16/28 (2013.01);
Abstract
A memory device includes a first memory array comprising a first bit cell configured to store a first logical state; and a reference signal provision (RSP) unit, coupled to the first memory array, and configured to provide a first reference signal that represents an average of a discharging rate and a leakage rate of a second memory array. In an embodiment, the first logical state stored by the first bit cell is read out using the first reference signal.