The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2018

Filed:

Jun. 14, 2016
Applicant:

Excelliance Mos Corporation, Hsinchu County, TW;

Inventor:

Chu-Kuang Liu, Hsinchu County, TW;

Assignee:

Excelliance MOS Corporation, Hsinchu County, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/1083 (2013.01); H01L 29/407 (2013.01); H01L 29/7813 (2013.01);
Abstract

A power MOSFET includes a substrate, a semiconductor layer, a first gate, a second gate, a thermal oxide layer, a first CVD oxide layer, and a gate oxide layer. The semiconductor layer is formed on the substrate and has at least one trench. The first gate is located inside the trench. The second gate is located inside the trench on the first gate, wherein the second gate has a first portion and a second portion, and the second portion is located between the semiconductor layer and the first portion. The thermal oxide layer is located between the first gate and the semiconductor layer. The first CVD oxide layer is located between the first gate and the second gate. The gate oxide layer is generally located between the second gate and the semiconductor layer.


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