The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2018

Filed:

Sep. 28, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

MD Altaf Hossain, Portland, OR (US);

Nagi Aboulenein, King City, OR (US);

Jayapratap Bharathan, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G06F 13/16 (2006.01); G11C 8/18 (2006.01);
U.S. Cl.
CPC ...
G11C 7/1072 (2013.01); G06F 13/1684 (2013.01); G11C 7/1012 (2013.01); G11C 8/18 (2013.01);
Abstract

A shared command/address (C/A) bus for memory devices in a multi-channel configuration can enable reducing the number of pins and signal lines in a memory subsystem. In one embodiment, a memory controller includes hardware logic to generate commands to access a plurality of memory devices via a plurality of channels and input/output (I/O) circuitry to transmit command/address (C/A) information for the commands to the plurality of memory devices over a single C/A bus for the plurality of channels. In one embodiment, double-speed strobe signal lines can also enable reducing the number of pins and signal lines in a memory subsystem.


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