The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2018
Filed:
Sep. 26, 2013
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Kuljit S. Bains, Olympia, WA (US);
Suneeta Sah, Portland, OR (US);
John H. Crawford, Saratoga, CA (US);
Brian S. Morris, Santa Clara, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 13/12 (2006.01); G06F 12/06 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/06 (2013.01); G06F 12/0292 (2013.01); G06F 12/0638 (2013.01);
Abstract
A memory subsystem includes a group of memory devices connected to an address bus. The memory subsystem includes logic to uniquely map a physical address of a memory access command to each memory device of the group. Thus, each physical address sent by an associated memory controller uniquely accesses a different row of each memory device, instead of being mapped to the same or corresponding row of each memory device.