The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2018
Filed:
Feb. 22, 2017
Applicant:
Globalfoundries Inc., Grand Cayman, KY;
Inventors:
Peter Baars, Dresden, DE;
Frank Jakubowski, Dresden, DE;
Assignee:
GLOBALFOUNDRIES Inc., Grand Cayman, KY;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 27/06 (2006.01); H01L 29/06 (2006.01); H01L 23/535 (2006.01); H01L 29/417 (2006.01); H01L 23/31 (2006.01); H01L 29/49 (2006.01); H01L 49/02 (2006.01); H01L 21/762 (2006.01); H01L 21/84 (2006.01); H01L 21/3213 (2006.01); H01L 21/321 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0629 (2013.01); H01L 21/32115 (2013.01); H01L 21/32133 (2013.01); H01L 21/76283 (2013.01); H01L 21/84 (2013.01); H01L 23/3178 (2013.01); H01L 23/535 (2013.01); H01L 28/60 (2013.01); H01L 29/0649 (2013.01); H01L 29/41783 (2013.01); H01L 29/495 (2013.01); H01L 29/4916 (2013.01);
Abstract
The present disclosure provides semiconductor devices and manufacturing techniques in which a buried capacitive structure may be provided at the level of the buried insulating layer of an SOI device, thereby providing reduced process complexity compared to conventional strategies, while still preserving superior routing capabilities above the buried capacitive structures.