The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2018
Filed:
Mar. 28, 2014
Intel Ip Corporation, Santa Clara, CA (US);
Intel IP Corporation, Santa Clara, CA (US);
Abstract
Logic may enable communication between stations in the presence of interference. Logic may communicate with the station in the presence of interference, the interference from a communication between other stations comprising a first network allocation vector (NAV) reminder, by entering a mode in which a Control Physical layer (PHY) modulation and coding scheme (MCS) is enabled and a Single Carrier PHY MCS is disabled. Logic may enable the Single Carrier PHY MCS in response to receipt of a clear-to-send (CTS) or an expiration of a CTS timeout. Logic may determine an active time remainder during a Contention-based access period. Logic may determine a time to access a channel in response to receipt of the Denial to Send and based upon a predefined, maximum inactivity time. Logic may remain beamformed while the apparatus is in the Control PHY mode.