The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2018

Filed:

Jan. 27, 2017
Applicants:

Te Connectivity Corporation, Berwyn, PA (US);

Tyco Electronics Japan G.k., Kawasaki-shi, JP;

Inventors:

Masayuki Aizawa, Machida, JP;

Chad William Morgan, Carneys Point, NJ (US);

Hiroshi Shirai, Tokorozawa, JP;

Assignees:

TE CONNECTIVITY CORPORATION, Berwyn, PA (US);

TYCO ELECTRONICS JAPAN G.K., Kawasaki-Shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 13/648 (2006.01); H01R 13/6587 (2011.01); H01R 12/70 (2011.01); H05K 1/11 (2006.01); H05K 1/02 (2006.01);
U.S. Cl.
CPC ...
H01R 13/6587 (2013.01); H01R 12/7011 (2013.01); H01R 12/7082 (2013.01); H05K 1/0245 (2013.01); H05K 1/116 (2013.01);
Abstract

A PCB includes a substrate having a connector surface with a PCB connector footprint defined along a longitudinal axis and a lateral axis and subdivided into PCB column grouping footprints extending generally parallel to the longitudinal axis. The PCB includes signal vias arranged in pairs along a signal pair axis with a plurality of pairs of signal vias in each PCB column grouping footprint. The signal pair axis is non-parallel to the longitudinal axis, non-parallel to the lateral axis and intersects the longitudinal axis at a lesser angle than the signal pair axis intersects the lateral axis. The PCB includes ground vias at least partially through the substrate. The ground vias are arranged around each of the pairs of signal vias to provide electrical shielding around each of the pairs of signal vias.


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