The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2018

Filed:

Apr. 05, 2017
Applicant:

E Ink Holdings Inc., Hsinchu, TW;

Inventors:

Hsiao-Wen Zan, Hsinchu, TW;

Shao-Fu Peng, Hsinchu, TW;

Cheng-Hang Hsu, Hsinchu, TW;

Assignee:

E Ink Holdings Inc., Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/148 (2006.01); H01L 29/80 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 21/336 (2006.01); H01L 51/05 (2006.01); H01L 51/10 (2006.01); H01L 51/00 (2006.01);
U.S. Cl.
CPC ...
H01L 51/0508 (2013.01); H01L 51/0012 (2013.01); H01L 51/0023 (2013.01); H01L 51/107 (2013.01); H01L 51/004 (2013.01); H01L 51/0036 (2013.01);
Abstract

A method of forming a transistor includes: forming a stack structure including a first conductive layer, a first insulating layer, a second conductive layer, and a second insulating layer on a substrate; patterning the first insulating layer, the second conductive layer, and the second insulating layer to form at least one opening passing through the first insulating layer, the second conductive layer, and the second insulating layer; forming a semiconductor layer over the second insulating layer and filling the opening; removing the portion of the semiconductor layer over the second insulating layer, in which the portion of the semiconductor layer filled in the opening constitutes at least one semiconductor channel; and forming a third conductive layer over the semiconductor channel.


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