The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2018

Filed:

Apr. 22, 2016
Applicant:

Semiconductor Components Industries, Llc, Phoenix, AZ (US);

Inventor:

Jaroslav Hynecek, Allen, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 5/378 (2011.01); H01L 27/146 (2006.01); H04N 5/357 (2011.01); H04N 5/355 (2011.01); H04N 5/3745 (2011.01);
U.S. Cl.
CPC ...
H01L 27/14612 (2013.01); H04N 5/355 (2013.01); H04N 5/3575 (2013.01); H04N 5/378 (2013.01); H04N 5/37452 (2013.01); H01L 27/14636 (2013.01);
Abstract

A CMOS image sensor may have back-side illuminated pixels and operate in a global shutter scanning mode. The CMOS image sensor may be implemented using three-layer chip stacking. The chip to chip electrical connections between the upper chip and the middle chip may be formed via hybrid bonding. Two bonding pads may be included in each pixel. The electrical connections between the middle chip and the lower chip may be formed at the periphery of the array. Using three-layer chip stacking with hybrid bonding allows for the transferring and storing of signals from the upper chip on the middle chip. A signal from low light level illumination and a charge overflow signal from high light level illumination may both be transferred to the middle chip. The image sensor may be able to use a global shutter scanning mode having high dynamic range.


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