The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 06, 2018

Filed:

Aug. 27, 2014
Applicant:

Advanced Silicon Group, Inc., Lincoln, MA (US);

Inventors:

Joanne Yim, San Francisco, CA (US);

Jeff Miller, Brookline, MA (US);

Michael Jura, Santa Monica, CA (US);

Marcie R. Black, Salem, NH (US);

Joanne Forziati, Everett, MA (US);

Brian Murphy, Revere, MA (US);

Lauren Magliozzi, Denver, CO (US);

Assignee:

Advanced Silicon Group, Inc., Lincoln, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 31/0236 (2006.01); H01L 31/18 (2006.01); B82Y 40/00 (2011.01); H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
H01L 31/02366 (2013.01); H01L 31/0236 (2013.01); H01L 31/1804 (2013.01); B82Y 40/00 (2013.01); H01L 21/30604 (2013.01); Y02E 10/50 (2013.01);
Abstract

In an aspect of the disclosure, a process for forming nanostructuring on a silicon-containing substrate is provided. The process comprises (a) performing metal-assisted chemical etching on the substrate, (b) performing a clean, including partial or total removal of the metal used to assist the chemical etch, and (c) performing an isotropic or substantially isotropic chemical etch subsequently to the metal-assisted chemical etch of step (a). In an alternative aspect of the disclosure, the process comprises (a) performing metal-assisted chemical etching on the substrate, (b) cleaning the substrate, including removal of some or all of the assisting metal, and (c) performing a chemical etch which results in regularized openings in the silicon substrate.


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