The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 06, 2018

Filed:

Oct. 23, 2015
Applicant:

Cadence Design Systems, Inc., San Jose, CA (US);

Inventors:

Mitchell G. Poplack, San Jose, CA (US);

Yuhei Hayashi, San Jose, CA (US);

Beshara Elmufdi, San Jose, CA (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4068 (2013.01); G06F 13/4282 (2013.01);
Abstract

Systems and methods of emulating application-specific integrated circuits using multiple execution phases, where different inputs and outputs are used or produced by components of the emulation system are disclosed. For example, an OMUX may select and transmit different data over a serial bus based on the execution phase of the emulator system. In another example, a processor or cluster may capture outputted data during a first execution phase, execute instructions for a second execution phase, and then return to the capture outputted data for further processing during a next cycle of the first execution phase.


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