The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 06, 2018

Filed:

Jan. 02, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Eng Hun Ooi, Georgetown, MY;

Robert J. Royer, Jr., Portland, OR (US);

Michael W. Williams, Folsom, CA (US);

Jeffrey R. Wilcox, El Dorado Hills, CA (US);

Ritesh B. Trivedi, Folsom, CA (US);

Blaise Fanning, Folsom, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/12 (2006.01); G06F 13/38 (2006.01); G06F 12/02 (2006.01); G06F 13/16 (2006.01); G06F 3/06 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 3/0679 (2013.01); G06F 13/12 (2013.01); G06F 13/16 (2013.01); G06F 13/1668 (2013.01); G06F 13/38 (2013.01); G06F 13/4234 (2013.01); G06F 12/02 (2013.01); G06F 2212/7202 (2013.01);
Abstract

In an embodiment, a memory interface may send an indication that a request is being sent. The indication may be sent to a non-volatile memory via a point-to-point bus between a memory interface and the non-volatile memory. The memory interface may send the request to the non-volatile memory via the bus. The request may include an address that may be used to identify a location for storing or reading data. The non-volatile memory may acquire the request from the bus and process the request. After processing the request, the non-volatile memory may send an indication to the memory interface that indicates the non-volatile memory has a response to send to the memory interface. The memory interface may grant access to the bus to the non-volatile memory. After being granted access to the bus, the non-volatile memory may send the response to the memory interface.


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