The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2018

Filed:

Jan. 10, 2017
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventor:

Chi-Han Yang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 49/02 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 28/24 (2013.01); H01L 21/76816 (2013.01); H01L 21/76877 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01);
Abstract

Structures and formation methods of a semiconductor device structure are provided. A method for forming a semiconductor device structure includes forming a first patterned conductive layer. The method also includes forming a dielectric layer covering the first conductive layer. The method further includes forming a conductive via in the dielectric layer. In addition, the method includes forming a resistor layer and a protection layer over the dielectric layer. The method also includes patterning the protection layer to form a protection feature and patterning the resistor layer to form a resistor feature overlapping the first conductive layer. The resistor feature is electrically connected to the first conductive layer through the conductive via. The method further includes forming a second conductive layer over the dielectric layer. The top surface of the resistor feature maintains covered by the protection feature during the formation of the second conductive layer.


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