The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 27, 2018

Filed:

Nov. 02, 2015
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Andrew D Strachan, Santa Clara, CA (US);

Alexei Sadovnikov, Sunnyvale, CA (US);

Christopher Boguslaw Kocon, Mountain Top, PA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 21/336 (2006.01); H01L 29/66 (2006.01); H01L 21/28 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/08 (2006.01); H01L 29/423 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28114 (2013.01); H01L 21/28158 (2013.01); H01L 29/0634 (2013.01); H01L 29/0649 (2013.01); H01L 29/0696 (2013.01); H01L 29/0865 (2013.01); H01L 29/0882 (2013.01); H01L 29/1083 (2013.01); H01L 29/1095 (2013.01); H01L 29/402 (2013.01); H01L 29/42356 (2013.01); H01L 29/66659 (2013.01); H01L 29/66681 (2013.01); H01L 29/7816 (2013.01); H01L 29/7831 (2013.01); H01L 29/7835 (2013.01); H01L 29/0653 (2013.01); H01L 29/42368 (2013.01); H01L 29/42376 (2013.01); H01L 29/665 (2013.01);
Abstract

A semiconductor device includes a split-gate lateral extended drain MOS transistor, which includes a first gate and a second gate laterally adjacent to the first gate. The first gate is laterally separated from the second gate by a gap of 10 nanometers to 250 nanometers. The first gate extends at least partially over the body, and the second gate extends at least partially over a drain drift region. The drain drift region abuts the body at a top surface of the substrate. A boundary between the drain drift region and the body at the top surface of the substrate is located under at least one of the first gate, the second gate and the gap between the first gate and the second gate. The second gate may be coupled to a gate bias voltage node or a gate signal node.


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