The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 20, 2018

Filed:

Oct. 21, 2016
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Hans-Joachim Schulze, Taufkirchen, DE;

Franz-Josef Niedernostheide, Hagen am Teutoburger Wald, DE;

Frank Dieter Pfirsch, Munich, DE;

Francisco Javier Santos Rodriguez, Villach, AT;

Stephan Voss, Munich, DE;

Wolfgang Wagner, Villach, AT;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 21/8234 (2006.01); H01L 27/082 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/739 (2006.01); H01L 29/66 (2006.01); H01L 29/749 (2006.01); H01L 29/08 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 21/82345 (2013.01); H01L 21/823418 (2013.01); H01L 21/823475 (2013.01); H01L 27/082 (2013.01); H01L 29/0607 (2013.01); H01L 29/0834 (2013.01); H01L 29/4238 (2013.01); H01L 29/42376 (2013.01); H01L 29/4916 (2013.01); H01L 29/4983 (2013.01); H01L 29/6634 (2013.01); H01L 29/66348 (2013.01); H01L 29/66363 (2013.01); H01L 29/7393 (2013.01); H01L 29/7397 (2013.01); H01L 29/749 (2013.01); H01L 27/0629 (2013.01); H01L 29/0696 (2013.01); H01L 29/7396 (2013.01);
Abstract

A semiconductor device and a method for producing thereof is provided. The semiconductor device includes a plurality of device cells, each comprising a body region, a source region, and a gate electrode adjacent to the body region and dielectrically insulated from the body region by a gate dielectric; and an electrically conductive gate layer comprising the gate electrodes or electrically connected to the gate electrodes of the plurality of device cells. The gate layer is electrically connected to a gate conductor and includes at least one of an increased resistance region and a decreased resistance region.


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