The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 13, 2018
Filed:
Mar. 28, 2017
Applicant:
Nxp Usa, Inc., Austin, TX (US);
Inventors:
Jenn Hwa Huang, Chandler, AZ (US);
Tianwei Sun, Chandler, AZ (US);
James A. Teplik, Chandler, AZ (US);
Assignee:
NXP USA, INC., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 21/768 (2006.01); H01L 21/3213 (2006.01); H01L 29/20 (2006.01); H01L 29/66 (2006.01); H01L 29/205 (2006.01); H01L 29/778 (2006.01); H01L 23/485 (2006.01); H01L 21/3205 (2006.01);
U.S. Cl.
CPC ...
H01L 29/402 (2013.01); H01L 21/32133 (2013.01); H01L 21/76877 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/41758 (2013.01); H01L 29/66462 (2013.01); H01L 29/7787 (2013.01); H01L 21/3205 (2013.01); H01L 23/485 (2013.01); H01L 29/404 (2013.01); H01L 29/7783 (2013.01);
Abstract
A device includes a transistor formed over a substrate. The transistor includes a source structure, a drain structure, and a gate structure. A dielectric layer is formed over the transistor, and a plurality of vias are electrically connected to the source structure. A metal layer is formed over the dielectric layer. The metal layer includes a field plate over the gate structure, a plurality of contact pads over each via, and a plurality of fingers interconnecting each one of the plurality of contact pads to the field plate.