The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2018

Filed:

Oct. 26, 2015
Applicant:

Altera Corporation, San Jose, CA (US);

Inventor:

Yuanlin Xie, Fremont, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/02 (2006.01); H01L 25/065 (2006.01); H01L 23/498 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); H01L 23/49816 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 23/49894 (2013.01); H01L 25/50 (2013.01); H01L 2224/14 (2013.01); H01L 2224/16225 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01);
Abstract

An integrated circuit package may include a first integrated circuit die having a first bump structure, a second integrated circuit die having a second bump structure, and a detachable interconnect structure having first and second conductive structures that is positioned between the first and second integrated circuit dies. In order to establish electrical communication between the first and second integrated circuit dies, the first conductive structure of the detachable interconnect structure is connected to the first bump structure of the first integrated circuit die, and the second conductive structure of the detachable interconnect structure is connected to the second bump structure of the second integrated circuit die. The detachable interconnect structure may also be used to facilitate wafer-level testing prior to packaging the first and second integrated circuit dies to form the integrated circuit package.


Find Patent Forward Citations

Xie, Yuanlin. (2018). Integrated circuit packages with detachable interconnect structures (U.S. Patent No. 9893034). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9893034

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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