The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 13, 2018

Filed:

Dec. 29, 2011
Applicants:

Boris Ginzburg, Haifa, IL;

Ronny Ronen, Haifa, IL;

Ilya Osadchiy, Haifa, IL;

Inventors:

Boris Ginzburg, Haifa, IL;

Ronny Ronen, Haifa, IL;

Ilya Osadchiy, Haifa, IL;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/07 (2006.01); G06F 9/30 (2006.01); G06F 12/08 (2016.01);
U.S. Cl.
CPC ...
G06F 11/0784 (2013.01); G06F 9/30036 (2013.01); G06F 9/30043 (2013.01); G06F 12/08 (2013.01);
Abstract

A processor of an aspect includes an instruction pipeline to process a multiple memory address instruction that indicates multiple memory addresses. The processor also includes multiple page fault aggregation logic coupled with the instruction pipeline. The multiple page fault aggregation logic is to aggregate page fault information for multiple page faults that are each associated with one of the multiple memory addresses of the instruction. The multiple page fault aggregation logic is to provide the aggregated page fault information to a page fault communication interface. Other processors, apparatus, methods, and systems are also disclosed.


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