The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2018

Filed:

May. 19, 2017
Applicant:

Alpha and Omega Semiconductor (Cayman) Ltd., Sunnyvale, CA (US);

Inventors:

Bum-Seok Suh, Seongnam, KR;

Zhiqiang Niu, Santa Clara, CA (US);

Wonjin Cho, Suwon-si, KR;

Cheow Khoon Oh, The Hacienda, SG;

Son Tran, San Jose, CA (US);

James Rachana Bou, Long Beach, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/31 (2006.01); H02P 27/00 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49575 (2013.01); H01L 23/3114 (2013.01); H01L 23/4952 (2013.01); H01L 23/49537 (2013.01); H01L 23/49555 (2013.01); H01L 27/0629 (2013.01); H02P 27/00 (2013.01);
Abstract

An intelligent power module (IPM) has a first, second, third and fourth die paddles, a first, second, third, fourth, fifth and sixth transistors, a tie bar, a low voltage IC, a high voltage IC, a first, second and third boost diodes, a plurality of leads and a molding encapsulation. The first transistor is attached to the first die paddle. The second transistor is attached to the second die paddle. The third transistor is attached to the third die paddle. The fourth, fifth and sixth transistor s are attached to the fourth die paddle. The low and high voltage ICs are attached to the tie bar. The molding encapsulation encloses the first, second, third and fourth die paddles, the first, second, third, fourth, fifth and sixth transistors, the tie bar, the low and high voltage ICs, and the first, second and third boost diodes. The IPM has a reduced top surface area and a reduced number of leads compared to a conventional IPM.


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