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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9881828 B1

PDFFull Text
Date of Patent:
Jan. 30, 2018

Filed:

Jan. 20, 2017

Wafer processing method

Applicant:

Disco Corporation, Tokyo, JP;

Inventors:

Shinji Yoshida, Tokyo, JP;

Yusaku Ito, Tokyo, JP;

Hirohide Yano, Tokyo, JP;

Assignee:

DISCO CORPORATION, Tokyo, JP;

Attorney:

Greer Burns & Crain Ltd.

Primary Examiner:

Marvin Payen

Assistant Examiner:

Jeremy Joy

Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 21/683 (2006.01); H01L 21/304 (2006.01); H01L 21/67 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 21/6836 (2013.01); H01L 21/67253 (2013.01); H01L 21/67288 (2013.01); H01L 21/78 (2013.01); H01L 22/20 (2013.01); H01L 22/24 (2013.01); H01L 2221/68327 (2013.01); H01L 2221/68377 (2013.01); H01L 2221/68381 (2013.01);
Abstract

Disclosed herein is a wafer processing method including the steps of attaching a dicing tape to the back side of a wafer, the dicing tape being composed of a base tape, a DAF, and an adhesive layer for uniting the base tape and the DAF, imaging the wafer through the dicing tape to obtain an image of the wafer, detecting the positions of poor adhesion of the DAF from the image, storing the positions of poor adhesion detected above, dividing the wafer and the DAF into individual chips each having the DAF, curing the adhesive layer of the dicing tape by the application of ultraviolet light, selectively separating the chips with the DAF well adhered, at the boundary between the adhesive layer and the DAF according to the positions of poor adhesion stored above, and then picking up the chips with the DAF well adhered.

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