The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 30, 2018

Filed:

Feb. 16, 2016
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Chikara Kondo, Hachioji, JP;

Tomoyuki Shibata, Kokubunji, JP;

Ryota Suzuki, Zama, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/00 (2006.01); G11C 29/12 (2006.01); G11C 29/44 (2006.01); G11C 29/56 (2006.01);
U.S. Cl.
CPC ...
G11C 29/1201 (2013.01); G11C 29/4401 (2013.01); G11C 2029/5602 (2013.01);
Abstract

Apparatuses including an interface chip that interfaces with dice through memory channels are described. An example apparatus includes: an interface chip that interfaces with a plurality of dice through a plurality of memory channels, each of the dice comprising a plurality of memory cells, and the interface chip comprising a test circuit. The test circuit includes: first and second terminals corresponding to the first and second memory channels respectively; a test terminal and a built in self test (BIST) circuit common to the first and second memory channels; and a selector coupled to the first and second terminals, the test terminal and the BIST circuit, and couples a first selected one of the first terminal, the test terminal and the BIST circuit to the first channel and a second selected one of the second terminal, the test terminal and the BIST circuit to the second channel.


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