The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9881122 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 30, 2018

Filed:

Mar. 30, 2016
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Hariharasudhan Kathiresan, Dresden, DE;

Eric Cotte, Dresden, DE;

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G03F 7/20 (2006.01);
U.S. Cl.
CPC ...
G06F 17/5081 (2013.01); G03F 7/70633 (2013.01);
Abstract

Method and apparatus for reducing overlay measurements and predicting overlay in unmeasured regions of a wafer are provided. Embodiments include providing a wafer having sets of four fields sharing a common vertex; measuring overlay values near each corner of each field, except for a corner near the common vertex of a first field and a corner near the common vertex of a second field of each set; decomposing the measured overlay values into measured interfield and intrafield correctable and non-correctable errors; forming a virtual stack of all fields; determining an average intrafield correctable error and intrafield non-correctable error for each corner of the virtual stack based on the measured intrafield correctable and non-correctable errors, respectively; and predicting the overlay values for the unmeasured corners of each set based on combinations of the measured interfield correctable and non-correctable errors and the average intrafield correctable and non-correctable errors.


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