The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2018

Filed:

Jan. 23, 2017
Applicant:

Sandisk Technologies Llc, Plano, TX (US);

Inventors:

Keerti Shukla, Saratoga, CA (US);

Raghuveer S. Makala, Campbell, CA (US);

Rahul Sharangpani, Fremont, CA (US);

Fei Zhou, Milpitas, CA (US);

Assignee:

SANDISK TECHNOLOGIES LLC, Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 21/768 (2006.01); H01L 27/11524 (2017.01); H01L 27/11556 (2017.01); H01L 27/1157 (2017.01); H01L 27/11582 (2017.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01);
U.S. Cl.
CPC ...
H01L 21/7682 (2013.01); H01L 21/76814 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/5329 (2013.01); H01L 23/53209 (2013.01); H01L 23/53214 (2013.01); H01L 23/53242 (2013.01); H01L 23/53257 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01);
Abstract

A memory opening is formed through an alternating stack of sacrificial material layers and electrically conductive layers located over a substrate. Discrete annular dielectric metal oxide structures are formed on sidewalls of the electrically conductive layers around the memory opening. After forming memory stack structures including the annular dielectric metal oxide structures in the memory opening, lateral recesses are formed by removing the sacrificial material layers selective to the electrically conductive layers. Sacrificial material layers in the memory stack structure are etched at levels of the lateral recesses to form discrete annular structures at each level of the electrically conductive layers, each of which includes, from inside to outside, a respective annular charge storage structure, and a respective blocking dielectric comprising an annular dielectric metal oxide structure.


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