The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 23, 2018
Filed:
Sep. 26, 2014
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Herbert Hum, Portland, OR (US);
Eric Sprangle, Austin, TX (US);
Douglas Carmean, Beaverton, OR (US);
Rajesh Kumar, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2006.01); G06T 1/20 (2006.01); G06F 9/50 (2006.01); G06F 13/24 (2006.01); G06F 9/38 (2006.01); G06F 9/46 (2006.01); G06F 1/20 (2006.01); G06F 12/0875 (2016.01);
U.S. Cl.
CPC ...
G06F 1/3293 (2013.01); G06F 1/206 (2013.01); G06F 1/3203 (2013.01); G06F 1/324 (2013.01); G06F 1/3206 (2013.01); G06F 1/3228 (2013.01); G06F 1/3287 (2013.01); G06F 1/3296 (2013.01); G06F 9/3869 (2013.01); G06F 9/461 (2013.01); G06F 9/5088 (2013.01); G06F 9/5094 (2013.01); G06F 12/0875 (2013.01); G06F 13/24 (2013.01); G06T 1/20 (2013.01); G06F 2209/5017 (2013.01); G06F 2212/452 (2013.01); Y02B 60/121 (2013.01); Y02B 60/1217 (2013.01); Y02B 60/1285 (2013.01); Y02B 60/32 (2013.01);
Abstract
Techniques to control power and processing among a plurality of asymmetric cores. In one embodiment, one or more asymmetric cores are power managed to migrate processes or threads among a plurality of cores according to the performance and power needs of the system.