The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 16, 2018
Filed:
Oct. 28, 2013
Beijing Sifang Automation Co., Ltd, Beijing, CN;
Zhengqiang Xiao, Beijing, CN;
Zhiguang Hou, Beijing, CN;
Haitao Yuan, Beijing, CN;
Jiong Hu, Beijing, CN;
Tao Zhou, Beijing, CN;
Qiurong Chen, Beijing, CN;
Wanfang Xu, Beijing, CN;
Kun Xiao, Beijing, CN;
Tongzhong Fang, Beijing, CN;
Beijing Sifang Automation Co., Ltd, Beijing, CN;
Abstract
This invention relates to a method for making 32-bit addressing of SV data by utilizing FPGA, which may be applied to processing digital sampling data in an equipment of an intelligent substation. Specifically, the method includes the following steps: FPGA receiving naked SV data packages generated based on IEEE802.3 standard; analyzing data structure of Ethernet frame; based on characteristics of the Ethernet frame of the SV data, the SV data of the network byte sequence being reorganized by utilizing ASN.1 coding rules, so that the SV data being converted into a data that can be directly accessed by 32-bit addressing processors. As a result, SV data decoding efficiency is improved greatly. This invention may make the decoding efficiency of 32-bit addressing processor improved by 5-10 times, thus solve problem of declined efficiency due to processing network byte order by splitting and reorganization.