The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 16, 2018
Filed:
Dec. 31, 2015
Applicant:
Mediatek Inc., Hsin-Chu, TW;
Inventors:
Ming-Tzong Yang, Baoshan Township, Hsinchu County, TW;
Yu-Hua Huang, Hsinchu, TW;
Wei-Che Huang, Zhudong Township, Hsinchu County, TW;
Assignee:
MEDIATEK INC., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/538 (2006.01); H01L 21/768 (2006.01); H01L 23/00 (2006.01); H01L 23/528 (2006.01); H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 23/481 (2013.01); H01L 21/76898 (2013.01); H01L 23/528 (2013.01); H01L 23/5384 (2013.01); H01L 24/11 (2013.01); H01L 27/088 (2013.01); H01L 29/0649 (2013.01); H01L 29/42356 (2013.01); H01L 2224/02372 (2013.01); H01L 2224/0912 (2013.01); H01L 2225/06541 (2013.01);
Abstract
The invention provides a semiconductor package with a through silicon via (TSV) interconnect. An exemplary embodiment of the semiconductor package with a TSV interconnect includes a semiconductor substrate, having a front side and a back side. A contact array is disposed on the front side of the semiconductor substrate. An isolation structure is disposed in the semiconductor substrate, underlying the contact array. The TSV interconnect is formed through the semiconductor substrate, overlapping with the contact array and the isolation structure.