The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2018

Filed:

Oct. 17, 2016
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Hyunui Lee, Osan-si, KR;

Won-joo Yun, Yongin-si, KR;

Hye-seung Yu, Goyang-si, KR;

In-dal Song, Seoul, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 7/12 (2006.01); G06F 3/06 (2006.01); G11C 7/22 (2006.01); G11C 8/08 (2006.01); G11C 8/14 (2006.01); G11C 29/12 (2006.01);
U.S. Cl.
CPC ...
G11C 7/12 (2013.01); G06F 3/0608 (2013.01); G06F 3/0652 (2013.01); G06F 3/0656 (2013.01); G06F 3/0673 (2013.01); G11C 7/22 (2013.01); G11C 8/08 (2013.01); G11C 8/14 (2013.01); G11C 29/12 (2013.01);
Abstract

Provided is a memory device configured to perform a calibration operation without having a ZQ pin. The memory device includes a calibration circuit configured to generate a pull-up calibration code and a pull-down calibration code which termination of a data input/output pad for impedance matching in the data input/output pad is controlled. The calibration circuit performs a first calibration operation for trimming first and second reference resistors based on an external resistor to be connected to a pad, and a second calibration operation for generating the pull-up calibration code and the pull-down calibration code based on the trimmed second reference resistor.


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