The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 16, 2018

Filed:

Apr. 06, 2015
Applicant:

Ob Realty, Llc, Irvine, CA (US);

Inventors:

George D. Kamian, Scotts Valley, CA (US);

Somnath Nag, Saratoga, CA (US);

Subramanian Tamilmani, San Jose, CA (US);

Mehrdad M. Moslehi, Los Altos, CA (US);

Karl-Josef Kramer, San Jose, CA (US);

Takao Yonehara, Milpitas, CA (US);

Assignee:

OB Realty, LLC, Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
C30B 1/10 (2006.01); C25D 11/32 (2006.01); H01L 31/18 (2006.01); C25D 17/00 (2006.01); C25D 17/06 (2006.01); C25D 11/00 (2006.01); C25F 3/12 (2006.01); C25F 7/00 (2006.01);
U.S. Cl.
CPC ...
C25D 11/32 (2013.01); C25D 11/005 (2013.01); C25D 17/001 (2013.01); C25D 17/06 (2013.01); C25F 3/12 (2013.01); C25F 7/00 (2013.01); H01L 31/1892 (2013.01); Y02E 10/50 (2013.01);
Abstract

This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further the disclosure is applicable to the general fields of Photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.


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