The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 09, 2018
Filed:
Nov. 21, 2013
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Inventor:
Hao-Chieh Chan, Hsinchu, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); G06F 1/32 (2006.01); H01L 25/065 (2006.01); H01L 25/18 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5386 (2013.01); G06F 1/32 (2013.01); H01L 23/49816 (2013.01); H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 24/82 (2013.01); H01L 25/0657 (2013.01); H01L 23/481 (2013.01); H01L 24/05 (2013.01); H01L 24/06 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 25/18 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/0557 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/17181 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/10252 (2013.01); H01L 2924/10253 (2013.01); H01L 2924/10271 (2013.01); H01L 2924/10272 (2013.01); H01L 2924/10329 (2013.01); H01L 2924/10331 (2013.01); H01L 2924/10332 (2013.01); H01L 2924/10333 (2013.01); H01L 2924/10335 (2013.01); H01L 2924/37001 (2013.01);
Abstract
A pattern generator includes and upper chip and one or more lower chips. The upper chip includes an upper substrate and a plurality of conductive plates on the upper substrate. The plurality of conductive plates is arranged as an array. The one or more lower chips include one or more lower substrates and a plurality of driving circuits each on one of the one or more lower substrates and electrically coupled with a corresponding one of the plurality of conductive plates. The upper chip and the one or more lower chips are stacked one over another.