The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2018

Filed:

Oct. 07, 2016
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Vishal Sarin, Cupertino, CA (US);

Allahyar Vahidimowlavi, San Jose, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/56 (2006.01); G11C 16/04 (2006.01); G11C 16/10 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 11/5628 (2013.01); G11C 16/0408 (2013.01); G11C 16/0458 (2013.01); G11C 16/10 (2013.01); G11C 16/3418 (2013.01); G11C 16/3427 (2013.01); G11C 2211/562 (2013.01); G11C 2211/5622 (2013.01); G11C 2211/5642 (2013.01); G11C 2211/5648 (2013.01);
Abstract

A first memory cell is programmed to a first level using a first set of program pulses within a first programming voltage range. A second memory cell to be programmed to a second level less than the first level is inhibited while programing the first memory cell to the first level. After programing the first memory cell to the first level, the second memory cell is programmed to the second level using a second set of program pulses within a second programming voltage range, where the first programming voltage range overlaps the second programming voltage range. The first memory cell that is programmed to the first level is inhibited while programing the second memory cell to the second level.


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