The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2018
Filed:
May. 31, 2016
Cadence Design Systems, Inc., San Jose, CA (US);
Hudson Dyele Oliveira, Belo Horizonte, BR;
Abner Luis Panho Marciano, Belo Horizonte, BR;
Guilherme Seminotti Braga, Belo Horizonte, BR;
Caio Texeira Campos, Austin, TX (US);
Breno Rodrigues Guimares, Belo Horizonte, BR;
Rodrigo Fonseca Rocha Soares, Belo Horizonte, BR;
Laiz Lipiainen Santos, Belo Horizonte, BR;
Raquel Lara dos Santos Pereira, Belo Horizonte, BR;
Adriana Cassia Rossi de Almeida Braz, Brasilia, BR;
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
Disclosed are techniques for implementing formal verification of an electronic design. These techniques identify a target property for verification in a hierarchical electronic design that has a plurality of hierarchies and perform hierarchical synthesis on a hierarchy or a portion thereof in the plurality of hierarchies while black-boxing a remaining portion of the hierarchical electronic design. Cone of influence (COI) data that is relevant to the target property may be determined at least by extracting the cone of influence data from a hierarchically synthesized hierarchy or portion of the hierarchy or the portion thereof. At least the cone of influence data may be forwarded to a formal engine that uses the cone of influence data to verify the target property.