The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2018
Filed:
Feb. 23, 2016
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Ravi L. Sahita, Beaverton, OR (US);
Xiaoning Li, Santa Clara, CA (US);
Manohar R. Castelino, Santa Clara, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/10 (2016.01); G06F 12/109 (2016.01); G06F 12/1009 (2016.01); G06F 9/455 (2006.01); G06F 12/14 (2006.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/109 (2013.01); G06F 9/45533 (2013.01); G06F 9/45558 (2013.01); G06F 12/1009 (2013.01); G06F 12/145 (2013.01); G06F 12/0292 (2013.01); G06F 2009/45583 (2013.01); G06F 2212/151 (2013.01); G06F 2212/657 (2013.01);
Abstract
Methods and apparatus relating to low overhead paged memory runtime protection are described. In an embodiment, permission information for guest physical mapping are received prior to utilization of paged memory by an Operating System (OS) based on the guest physical mapping. The permission information is provided through an Extended Page Table (EPT). Other embodiments are also described.