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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9852949 B1

PDFFull Text
Date of Patent:
Dec. 26, 2017

Filed:

Sep. 01, 2016

Wafer processing method

Applicant:

Disco Corporation, Tokyo, JP;

Inventors:

Tetsukazu Sugiya, Tokyo, JP;

Xin Lu, Tokyo, JP;

Assignee:

Disco Corporation, Tokyo, JP;

Attorney:

Greer Burns & Crain Ltd.

Primary Examiner:

Scott B Geyer

Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 21/268 (2006.01); H01L 21/304 (2006.01); H01L 21/3105 (2006.01); H01L 21/67 (2006.01); B28D 5/00 (2006.01); B28D 5/02 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 21/78 (2013.01); B28D 5/00 (2013.01); B28D 5/02 (2013.01); H01L 21/268 (2013.01); H01L 21/304 (2013.01); H01L 21/3043 (2013.01); H01L 21/31058 (2013.01); H01L 21/561 (2013.01); H01L 21/67092 (2013.01); H01L 21/6836 (2013.01); H01L 23/3114 (2013.01); H01L 2221/6834 (2013.01); H01L 2221/68327 (2013.01);
Abstract

A wafer is divided into device chips each of which is surrounded by a mold resin. The wafer has a plurality of devices arranged like a matrix with a spacing having a predetermined width, the front side of each device being covered with the mold resin, the spacing being filled with the mold resin to form a street between any adjacent ones of the devices. The wafer processing method includes a division start point forming step of forming a division start point along each street at the lateral center of the mold resin filling the spacing and a dividing step of applying an external force to the wafer after performing the division start point forming step, thereby laterally dividing each street into two parts at the division start point to obtain the device chips divided from each other, each device chip being surrounded by the mold resin.

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