The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2017

Filed:

Dec. 28, 2015
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Lipeng Cao, La Jolla, CA (US);

Dorav Kumar, San Diego, CA (US);

Bilal Zafar, San Diego, CA (US);

Ramaprasath Vilangudipitchai, San Diego, CA (US);

Venkatasubramanian Narayanan, San Diego, CA (US);

Xi Luo, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01H 47/00 (2006.01); H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
H01H 47/00 (2013.01); H03K 19/0008 (2013.01);
Abstract

An integrated circuit (IC) is disclosed herein for adjustable power rail multiplexing. In an example aspect, an IC includes a first power rail, a second power rail, and a load power rail. The IC further includes multiple power-multiplexer (power-mux) tiles and adjustment circuitry. The multiple power-mux tiles are coupled in series in a chained arrangement and implemented to jointly perform a power-multiplexing operation. Each power-mux tile is implemented to switch between coupling the load power rail to the first power rail and coupling the load power rail to the second power rail. The adjustment circuitry is implemented to adjust at least one order in which the multiple power-mux tiles perform at least a portion of the power-multiplexing operation.


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