The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2017
Filed:
Jun. 22, 2015
Applicant:
Kandou Labs SA, Lausanne, CH;
Inventors:
David R. Stauffer, Essex Junction, VT (US);
Andrew Kevin John Stewart, Astcote, GB;
John D. Keay, Bedford, GB;
Assignee:
KANDOU LABS, S.A., , CH;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); G11C 29/02 (2006.01); G11C 5/04 (2006.01); G11C 29/18 (2006.01); G11C 29/00 (2006.01);
U.S. Cl.
CPC ...
G11C 29/025 (2013.01); G11C 5/04 (2013.01); G11C 29/18 (2013.01); G11C 29/702 (2013.01); G11C 2029/1802 (2013.01);
Abstract
Conventional methods using signal test patterns to identify wiring errors are difficult to apply to interfaces encoding information as signal state transitions rather than directly as signal states. A system utilizing excitation of wires with selected transition coded patterns and evaluation of received results is described to identify failed wire connections. This approach may be advantageously used to provide fault detection and redundant path selection in systems incorporating stacked chip interconnections using Through Silicon Vias.