The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2017
Filed:
Mar. 10, 2016
Applicant:
Toshiba Memory Corporation, Tokyo, JP;
Inventors:
Kazutaka Takizawa, Yokohama Kanagawa, JP;
Masaaki Niijima, Tokyo, JP;
Assignee:
Toshiba Memory Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G11C 11/4091 (2006.01); G11C 11/406 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4091 (2013.01); G11C 11/40607 (2013.01);
Abstract
A semiconductor memory device includes a semiconductor memory chip including a plurality of regions of memory cells, including a first memory region and a second memory region, and a memory controller configured to carry out a read of a memory cell in the first memory region by applying a first read voltage, and a read of a memory cell in the second memory region by applying a second read voltage that is different from the first read voltage.
Takizawa, Kazutaka. (2017). Semiconductor memory device that varies voltage levels depending on which of different memory regions thereof is accessed (U.S. Patent No. 9852786). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9852786
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile