The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2017
Filed:
Mar. 15, 2013
Virident Systems Inc., Milpitas, CA (US);
Vijay Karamcheti, Palo Alto, CA (US);
Ashish Singhai, Cupertino, CA (US);
Ashwin Narasimha, Sunnyvale, CA (US);
Muthugopalkrishnan Adiseshan, Bangalore, IN;
Viswesh Sankaran, Bangalore, IN;
Ajith Kumar, Dodda Kammanahalli, IN;
VIRIDENT SYSTEMS, LLC, San Jose, CA (US);
Abstract
A method for managing a non-volatile random-access memory (NVRAM)-based storage subsystem, the method including: monitoring, by a slave controller on a NVRAM device of the NVRAM-based storage subsystem, an I/O operation on the NVRAM device; identifying, by the slave controller and based on the monitoring, at least one occurrence of error data; comparing, by the slave controller, a numeric aspect of the at least one occurrence of error data with a threshold setting; reporting, by the slave controller on the NVRAM device and to a master controller of the NVRAM-based storage subsystem, the at least one occurrence of error data in response to the numeric aspect crossing the threshold setting; and ascertaining, by the master controller of the NVRAM-based storage system, a physical location of a defect region on the NVRAM device where the error data has occurred by analyzing the reported at least one occurrence of error data.