The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 2017

Filed:

Dec. 12, 2014
Applicant:

Rambus Inc., Sunnyvale, CA (US);

Inventors:

Donald R. Mullen, Berkeley, CA (US);

Chi-Ming Yeung, Cupertino, CA (US);

David A. Secker, San Jose, CA (US);

Assignee:

Rambus Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/14 (2006.01); G06F 1/18 (2006.01); H05K 7/14 (2006.01); H05K 7/20 (2006.01);
U.S. Cl.
CPC ...
G06F 1/183 (2013.01); G06F 1/185 (2013.01); H05K 7/1487 (2013.01); H05K 7/20409 (2013.01); H05K 7/20709 (2013.01); H05K 1/14 (2013.01);
Abstract

A rack unit configuration is described that includes a first printed circuit board (PCB) assembly interleaved with a second PCB assembly that is inverted with respect to the first PCB assembly. The configuration of the first PCB assembly and the second PCB assembly allow for increased component and power densities within computing systems, memory systems, etc. The increased density may be achieved while allowing sufficient mechanical clearance to allow easy component replacement and servicing (e.g., and hot pluggability). Power density may also be increased with PCB assemblies including nested and interleaved power modules.


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