The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 2017

Filed:

May. 29, 2013
Applicants:

Jerome Enjalbert, Fonsorbes, FR;

Joachim Kruecken, Munich, DE;

Jalal Ouaddah, Toulouse, FR;

Inventors:

Jerome Enjalbert, Fonsorbes, FR;

Joachim Kruecken, Munich, DE;

Jalal Ouaddah, Toulouse, FR;

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/59 (2006.01); G05F 1/56 (2006.01); G05F 1/575 (2006.01); G05F 1/565 (2006.01);
U.S. Cl.
CPC ...
G05F 1/575 (2013.01); G05F 1/56 (2013.01); G05F 1/565 (2013.01);
Abstract

A voltage regulator for digital loads combines a closed loop regulation circuit with an open loop topology. A transistor and a bank of transistors share the same voltage source VDD and gate control current. Each of the bank of transistors is sized to match different current load requirements and one or more may be switched in or out as appropriate when the digital load transitions from one operating mode to another. The regulator has good DC load regulation and unconditional stability regardless of output capacitance.


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