The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2017

Filed:

Oct. 21, 2015
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Bruce J. Chamberlin, Vestal, NY (US);

Andreas Huber, Boeblingen, DE;

Harald Huels, Boeblingen, DE;

Thomas Strach, Boeblingen, DE;

Thomas-Michael Winkel, Boeblingen, DE;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/18 (2006.01); H05K 1/11 (2006.01); H05K 3/00 (2006.01); H05K 3/46 (2006.01); H05K 1/02 (2006.01); H05K 3/40 (2006.01); H05K 1/09 (2006.01); H05K 1/16 (2006.01);
U.S. Cl.
CPC ...
H05K 1/184 (2013.01); H05K 1/0298 (2013.01); H05K 1/092 (2013.01); H05K 1/111 (2013.01); H05K 1/115 (2013.01); H05K 3/0047 (2013.01); H05K 3/4038 (2013.01); H05K 3/4644 (2013.01); H05K 1/162 (2013.01); H05K 1/165 (2013.01); H05K 1/167 (2013.01); H05K 1/185 (2013.01); H05K 2201/093 (2013.01); H05K 2201/09309 (2013.01); H05K 2201/09327 (2013.01); H05K 2201/09345 (2013.01); H05K 2201/09509 (2013.01); H05K 2201/09545 (2013.01); H05K 2201/10 (2013.01); H05K 2201/1003 (2013.01); H05K 2201/1006 (2013.01); H05K 2201/10015 (2013.01); H05K 2201/10022 (2013.01);
Abstract

Embedding a discrete electrical device in a printed circuit board (PCB) includes: providing a vertical via as a blind hole from a horizontal surface of the PCB to an electrically conductive structure in a first layer, the first layer being one layer of a first core section of a plurality of core sections vertically arranged above each other, each core section including lower and upper conductive layers, and a non-conductive layer in between; inserting the electrical device into the via, with the device extending within at least two of the core sections; establishing a first electrical connection between a first electrical device contact device and the electrically conductive structure in the first layer; and establishing a second electrical connection between a second electrical device contact and a second layer, the second layer being one of the electrically conductive layers of a second horizontal core section.


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