The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2017

Filed:

Aug. 12, 2016
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventor:

Juergen Faul, Radebeul, DE;

Assignee:

GLOBALFOUNDRIES Inc., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 23/50 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1207 (2013.01); H01L 23/50 (2013.01); H01L 27/0288 (2013.01);
Abstract

The present disclosure provides a semiconductor device structure including a substrate having a semiconductor-on-insulator (SOI) region and a hybrid region, wherein the SOI region and the hybrid region are separated by at least one isolation structure, the SOI region being formed by a semiconductor layer provided over a substrate material and a buried insulating material interposed between the semiconductor layer and the substrate material, a semiconductor device provided in the SOI region, the semiconductor device comprising a gate structure and source and drain regions formed adjacent to the gate structure, and a diode structure provided in the hybrid region, the diode structure comprising a well region doped with dopants of a first conductivity type and a well portion doped with dopants of a second conductivity type embedded into the well region in the hybrid region.


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