The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2017
Filed:
Aug. 24, 2016
Powertech Technology Inc., Hsinchu, TW;
Chia-Wei Chang, Hsinchu, TW;
Kuo-Ting Lin, Hsinchu, TW;
Powertech Technology Inc., Hsinchu County, TW;
Abstract
A fan-out multi-chip package has a first redistribution layer and a plurality of chips encapsulated in an encapsulant. A dielectric layer and a second redistribution layer are formed on the encapsulant. A bottom surface of the encapsulant is formed when forming the encapsulant. The first redistribution layer has a plurality of connecting surfaces exposed on the bottom surface of the encapsulant. The dielectric layer is formed on the bottom surface of the encapsulant without covering the connecting surfaces. The second redistribution layer includes a plurality of bump pads coupled to the connecting surfaces. The fan-out circuitry is covered by the dielectric layer. Thereby, a multi-chip package is able to reduce possible damages to the active surfaces and bonding pads of the chips during packaging process.