The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2017
Filed:
Mar. 09, 2016
Applicant:
Freescale Semiconductor, Inc., Austin, TX (US);
Inventors:
Gilles Muller, Austin, TX (US);
Ronald J. Syzdek, Austin, TX (US);
Assignee:
NXP USA, Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/06 (2006.01); G11C 16/28 (2006.01); G11C 16/08 (2006.01); G11C 8/10 (2006.01); G11C 8/08 (2006.01);
U.S. Cl.
CPC ...
G11C 16/28 (2013.01); G11C 16/08 (2013.01); G11C 8/08 (2013.01); G11C 8/10 (2013.01);
Abstract
A memory is provided. The memory includes an array of non-volatile memory (NVM) cells arranged in a plurality sectors. A control gate driver circuit has an output coupled to control gates of the NVM cells in a sector in the plurality of sectors. An address decoder is coupled to the control gate driver circuit. And a latch circuit is coupled between the address decoder and the control gate driver circuit. The latch circuit stores a first value, and based on the stored first value, the control gate driver circuit output is floating.